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122 lines
5.3 KiB
C
122 lines
5.3 KiB
C
#pragma once
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// DISCLAIMER:
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// THIS FILE IS CREATED FROM SCRATCH, BY READING THE OFFICIAL NVML API
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// DOCUMENTATION REFERENCED BELOW, IN ORDER TO MAKE FASTFETCH MIT COMPLIANT.
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// https://docs.nvidia.com/deploy/nvml-api/group__nvmlDeviceStructs.html
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#define NVML_DEVICE_PCI_BUS_ID_BUFFER_SIZE 32
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#define NVML_DEVICE_PCI_BUS_ID_BUFFER_V2_SIZE 16
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typedef enum { NVML_SUCCESS = 0 } nvmlReturn_t;
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typedef struct nvmlDevice_t* nvmlDevice_t;
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// https://docs.nvidia.com/deploy/nvml-api/structnvmlPciInfo__t.html
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// PCI information about a GPU device
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typedef struct {
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// The legacy tuple domain:bus:device.function PCI identifier (& NULL terminator)
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char busIdLegacy[NVML_DEVICE_PCI_BUS_ID_BUFFER_V2_SIZE];
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// The PCI domain on which the device's bus resides, 0 to 0xffffffff
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unsigned int domain;
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// The bus on which the device resides, 0 to 0xff
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unsigned int bus;
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// The device's id on the bus, 0 to 31
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unsigned int device;
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// The combined 16-bit device id and 16-bit vendor id
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unsigned int pciDeviceId;
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// The 32-bit Sub System Device ID
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unsigned int pciSubSystemId;
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// The tuple domain:bus:device.function PCI identifier (& NULL terminator)
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char busId[NVML_DEVICE_PCI_BUS_ID_BUFFER_SIZE];
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} nvmlPciInfo_t;
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// https://docs.nvidia.com/deploy/nvml-api/group__nvmlDeviceEnumvs.html#group__nvmlDeviceEnumvs_1g2650b526841fa38b8f293c2d509a1de0
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// Temperature sensors
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typedef enum {
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// Temperature sensor for the GPU die
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NVML_TEMPERATURE_GPU = 0,
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NVML_TEMPERATURE_COUNT,
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} nvmlTemperatureSensors_t;
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// https://docs.nvidia.com/deploy/nvml-api/structnvmlMemory__v2__t.html#structnvmlMemory__v2__t
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// Memory allocation information for a device (v2)
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typedef struct {
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// Structure format version (must be 2)
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unsigned int version;
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// Total physical device memory (in bytes)
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unsigned long long total;
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// Device memory (in bytes) reserved for system use (driver or firmware)
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unsigned long long reserved;
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// Unallocated device memory (in bytes)
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unsigned long long free;
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// Allocated device memory (in bytes)
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unsigned long long used;
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} nvmlMemory_v2_t;
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// https://github.com/NVIDIA/nvidia-settings/issues/78#issuecomment-1012837988
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enum { nvmlMemory_v2 = (unsigned int)(sizeof(nvmlMemory_v2_t) | (2 << 24U)) };
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// https://docs.nvidia.com/deploy/nvml-api/group__nvmlDeviceEnumvs.html#group__nvmlDeviceEnumvs_1g805c0647be9996589fc5e3f6ff680c64
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// Clock types
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typedef enum {
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// Graphics clock domain
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NVML_CLOCK_GRAPHICS = 0,
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// SM clock domain
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NVML_CLOCK_SM = 1,
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// Memory clock domain
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NVML_CLOCK_MEM = 2,
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// Video encoder/decoder clock domain
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NVML_CLOCK_VIDEO = 3,
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// Count of clock types
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NVML_CLOCK_COUNT,
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} nvmlClockType_t;
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// https://docs.nvidia.com/deploy/nvml-api/group__nvmlDeviceEnumvs.html#group__nvmlDeviceEnumvs_1gfa6b01990b212f7b49089b7158eafd2b
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// The Brand of the GPU
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typedef enum {
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NVML_BRAND_UNKNOWN = 0,
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NVML_BRAND_QUADRO = 1,
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NVML_BRAND_TESLA = 2,
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NVML_BRAND_NVS = 3,
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NVML_BRAND_GRID = 4,
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NVML_BRAND_GEFORCE = 5,
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NVML_BRAND_TITAN = 6,
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NVML_BRAND_NVIDIA_VAPPS = 7,
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NVML_BRAND_NVIDIA_VPC = 8,
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NVML_BRAND_NVIDIA_VCS = 9,
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NVML_BRAND_NVIDIA_VWS = 10,
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NVML_BRAND_NVIDIA_CLOUD_GAMING = 11,
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NVML_BRAND_NVIDIA_VGAMING = NVML_BRAND_NVIDIA_CLOUD_GAMING,
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NVML_BRAND_QUADRO_RTX = 12,
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NVML_BRAND_NVIDIA_RTX = 13,
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NVML_BRAND_NVIDIA = 14,
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NVML_BRAND_GEFORCE_RTX = 15,
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NVML_BRAND_TITAN_RTX = 16,
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NVML_BRAND_COUNT,
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} nvmlBrandType_t;
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// https://docs.nvidia.com/deploy/nvml-api/group__nvmlInitializationAndCleanup.html#group__nvmlInitializationAndCleanup
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// Initialize NVML, but don't initialize any GPUs yet
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nvmlReturn_t nvmlInit_v2(void);
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// Shut down NVML by releasing all GPU resources previously allocated with nvmlInit_v2()
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nvmlReturn_t nvmlShutdown(void);
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// https://docs.nvidia.com/deploy/nvml-api/group__nvmlDeviceQueries.html
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// Retrieves the number of compute devices in the system. A compute device is a single GPU
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extern nvmlReturn_t nvmlDeviceGetCount_v2(unsigned int* deviceCount);
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// Acquire the handle for a particular device, based on its index
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extern nvmlReturn_t nvmlDeviceGetHandleByIndex_v2(unsigned int index, nvmlDevice_t* device);
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// Acquire the handle for a particular device, based on its PCI bus id
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extern nvmlReturn_t nvmlDeviceGetHandleByPciBusId_v2(const char* pciBusId, nvmlDevice_t* device);
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// Retrieves the PCI attributes of this device
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extern nvmlReturn_t nvmlDeviceGetPciInfo_v3(nvmlDevice_t device, nvmlPciInfo_t* pci);
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// Retrieves the current temperature readings for the device, in degrees C
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extern nvmlReturn_t nvmlDeviceGetTemperature(nvmlDevice_t device, nvmlTemperatureSensors_t sensorType, unsigned int* temp);
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// Retrieves the amount of used, free, reserved and total memory available on the device, in bytes. The reserved amount is supported on version 2 only
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extern nvmlReturn_t nvmlDeviceGetMemoryInfo_v2(nvmlDevice_t device, nvmlMemory_v2_t* memory);
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// Gets the device's core count
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extern nvmlReturn_t nvmlDeviceGetNumGpuCores(nvmlDevice_t device, unsigned int* numCores);
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// Retrieves the maximum clock speeds for the device
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extern nvmlReturn_t nvmlDeviceGetMaxClockInfo(nvmlDevice_t device, nvmlClockType_t type, unsigned int* clock);
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// Retrieves the brand of this device
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extern nvmlReturn_t nvmlDeviceGetBrand(nvmlDevice_t device, nvmlBrandType_t* type);
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