CPU name is in "cpu model" field on MIPS. Also, /proc/cpuinfo contains
an "isa" field, but rather than being a single string like RISC-V it is
instead a space-separated list of every ISA flavor that the chip is
compatible with. Since these are mostly incremental, just make the
cpuISA value set to the last one.
Before:
```
$ fastfetch --structure "cpu" --logo none
CPU: mips1 mips2 mips3 mips4 mips5 mips32r1 mips32r2 mips64r1 mips64r2 (16)
```
After:
```
$ fastfetch --structure "cpu" --logo none
CPU: Cavium Octeon II V0.10 mips64r2 (16)
```
Excerpt for a thread from /proc/cpuinfo:
processor : 0
cpu : POWER9, altivec supported
clock : 3800.000000MHz
revision : 2.2 (pvr 004e 1202)
Without this patch, the following is printed for a CPU:
CPU: CPU (64) @ 3.8 GHz
With it, there is:
CPU: POWER9, altivec supported (64) @ 3.8 GHz
1. Temp detection has been gated behind of `--*-temp`. Don't make it a slow operation
2. According to [the kernel doc](https://www.kernel.org/doc/Documentation/hwmon/sysfs-interface), `temp1_input` is millidegree Celsius, which should be divided by 1000
3. There is no `/sys/class/hwmon/hwmon3/device/class` on my laptop, but `/sys/class/hwmon/hwmon3/device/device/class`. Need to confirm with @LinusDierheimer
4. Small code optimizations
1. simplify resource management by using C++ RAII like GCC attribute extension `cleanup`
2. simplify HEKY reading
Actually `__attribute__((__cleanup__(cleanupFn)))` is supported on all major C compiler ( gcc, clang and icc ) except MSVC I only used it on Windows and macOS for now. Let's see if the project author like it.
李通洲